n-channel fredfet absolute maximum ratings thermal and mechanical characteristics g d s single die fredfet symbol parameter 15f50k 15f50kf unit i d continuous collector current @ t c = 25c 15 6.2 a continuous collector current @ t c = 100c 10 3.9 i dm pulsed drain current 1 45 18.6 v gs gate-source voltage 2 30 v e as single pulse avalanche energy 2 305 mj i ar avalanche current, repetitive or non-repetitive 7 a symbol parameter min typ max unit p d power dissipation (t c = 25c) [k] 223 w power dissipation (t c = 25c) [kf] 37 r jc junction to case thermal resistance [k] 0.56 c/w r jc junction to case thermal resistance [kf] 3.3 r cs case to sink thermal resistance, flat, greased surface 0.11 t j ,t stg operating and storage junction temperature range -55 150 c t l soldering temperature for 10 seconds (1.6mm from case) 300 w t package weight 0.07 oz 1.2 g torque mounting torque ( to-220 package), 4-40 or m3 screw 10 inlbf 1.1 nm typical applications ? zvs phase shifted and other full bridge ? half bridge ? pfc and other boost converter ? buck converter ? single and two switch forward ? flyback features ? fast switching with low emi ? low t rr for high reliability ? ultra low c rss for improved noise immunity ? low gate charge ? avalanche energy rated ? rohs compliant apt15f50k apt15f50k_kf 500v, 15a, 0.39 max, t rr 190ns apt15f50kf power mos 8 ? is a high speed, high voltage n-channel switch-mode power mosfet. this 'fredfet' version has a drain-source (body) diode that has been optimized for high reliability in zvs phase shifted bridge and other circuits through reduced t rr , soft recovery, and high recovery dv/dt capability. low gate charge, high gain, and a greatly reduced ratio of c rss /c iss result in excellent noise immunity and low switching loss. the intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low emi and reliable paralleling, even when switching at very high frequency. microsemi website - http://www.microsemi.com 050-8145 rev e 3-2010
static characteristics t j = 25c unless otherwise speci ed dynamic characteristics t j = 25c unless otherwise speci ed source-drain diode characteristics 1 repetitive rating: pulse width and case temperature limited by maximum junction temperature. 2 starting at t j = 25c, l = 12.45mh, r g = 25 , i as = 7a. 3 pulse test: pulse width < 380 s, duty cycle < 2%. 4 c o(cr) is de ned as a xed capacitance with the same stored charge as c oss with v ds = 67% of v (br)dss . 5 c o(er) is de ned as a xed capacitance with the same stored energy as c oss with v ds = 67% of v (br)dss . to calculate c o(er) for any value of v ds less than v (br)dss, use this equation: c o(er) = -5.22e-8/v ds ^2 + 1.21e-8/v ds + 3.48e-11. 6 r g is external gate resistance, not including internal gate resistance or gate driver impedance. (mic4452) microsemi reserves the right to change, without notice, the speci cations and information contained herein. unit v v/c v mv/c a na unit s pf nc ns min typ max 500 0.60 0.33 0.39 2.5 4 5 -10 250 1000 100 min typ max 11 2250 30 240 140 70 55 13 26 10 12 26 8 test conditions v gs = 0v , i d = 250 a reference to 25c, i d = 250 a v gs = 10v , i d = 7a v gs = v ds , i d = 0.5ma v ds = 500v t j = 25c v gs = 0v t j = 125c v gs = 30v test conditions v ds = 50v , i d = 7a v gs = 0v , v ds = 25v f = 1mhz v gs = 0v , v ds = 0v to 333v v gs = 0 to 10v , i d = 7a, v ds = 250v resistive switching v dd = 333v , i d = 7a r g = 10 6 , v gg = 15v parameter drain-source breakdown voltage breakdown voltage temperature coef cient drain-source on resistance 3 gate-source threshold voltage threshold voltage temperature coef cient zero gate voltage drain current gate-source leakage current parameter forward transconductance input capacitance reverse transfer capacitance output capacitance effective output capacitance, charge related effective output capacitance, energy related total gate charge gate-source charge gate-drain charge turn-on delay time current rise time turn-off delay time current fall time symbol v br(dss) ? v br(dss) / ? t j r ds(on) v gs(th) ? v gs(th) / ? t j i dss i gss symbol g fs c iss c rss c oss c o(cr) 4 c o(er) 5 q g q gs q gd t d(on) t r t d(off) t f symbol parameter test conditions min typ max unit i s continuous source current (body diode) k mosfet symbol showing the integral reverse p-n junction diode (body diode) 15 a kf 6.2 i sm pulsed source current (body diode) 1 k45 kf 18.6 v sd diode forward voltage 3 i sd = 7a , t j = 25c, v gs = 0v 1.0 v t rr reverse recovery time i sd = 7a 3 v dd = 100v di sd / dt = 100a/ s t j = 25c 190 ns t j = 125c 340 q rr reverse recovery charge t j = 25c 0.54 c t j = 125c 1.27 i rrm reverse recovery current t j = 25c 5.9 a t j = 125c 7.9 dv/dt peak recovery dv/dt i sd 7a, di/dt 1000a/ s, v dd = 333v, t j = 125c 20 v/ns g d s 050-8145 rev e 3-2010 apt15f50k_kf
v gs = 7, & 10v 5.5v t j = 125c t j = 25c t j = -55c v gs = 10v 5v v ds > i d(on) x r ds(on) max. 250 sec. pulse test @ <0.5 % duty cycle normalized to v gs = 10v @ 7a t j = 125c t j = 25c t j = -55c c oss c iss i d = 7a v ds = 640v v ds = 160v v ds = 400v t j = 150c t j = 25c t j = 125c t j = 150c c rss t j = 125c t j = 25c t j = -55c 6.5v 6v v gs , gate-to-source voltage (v) g fs , transconductance r ds(on) , drain-to-source on resistance i d , drain current (a) i sd, reverse drain current (a) c, capacitance (pf) i d , drain current (a) i d , drian current (a) v ds(on) , drain-to-source voltage (v) v ds , drain-to-source voltage (v) figure 1, output characteristics figure 2, output characteristics t j , junction temperature (c) v gs , gate-to-source voltage (v) figure 3, r ds(on) vs junction temperature figure 4, transfer characteristics i d , drain current (a) v ds , drain-to-source voltage (v) figure 5, gain vs drain current figure 6, capacitance vs drain-to-source voltage q g , total gate charge (nc) v sd , source-to-drain voltage (v) figure 7, gate charge vs gate-to-source voltage figure 8, reverse drain current vs source-to-drain voltage 0 5 10 15 20 25 0 5 10 15 20 25 30 -55 -25 0 25 50 75 100 125 150 0 1 2 3 4 5 6 7 8 0 2 4 6 8 10 12 14 0 100 200 300 400 500 0 20 40 60 80 100 0 0.3 0.6 0.9 1.2 1.5 50 45 40 35 30 25 20 15 10 5 0 2.5 2.0 1.5 1.0 0.5 0 18 16 14 12 10 8 6 4 2 0 16 14 12 10 8 6 4 2 0 25 20 15 10 5 0 45 40 35 30 25 20 15 10 5 0 4,000 1,000 100 10 1 45 40 35 30 25 20 15 10 5 0 apt15f50k_kf 050-8145 rev e 3-2010
1 10 100 1 10 100 1000 1 10 100 1 10 100 1000 0 0. 1 0. 2 0. 3 0. 4 0. 5 0. 6 10 -5 10 -4 10 -3 10 -2 0.1 1 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 10 -5 10 -4 10 -3 10 -2 0.1 1 1ms 100ms r ds(on) 0.5 single pulse 0.1 0.3 0.7 0.05 d = 0.9 peak t j = p dm x z jc + t c duty factor d = t 1 / t 2 t 2 t 1 p dm note: t 1 = pulse duration dc line 100 s i dm 10ms 13 s 100 s i dm 100ms 10ms 13 s r ds(on) dc line 1ms z jc , thermal impedance (c/w) 0.3 d = 0.9 0.7 single pulse rectangular pulse duration (seconds) figure 12, 15f50kfmaximum effective transient thermal impedance, junction-to-case vs pulse duration 0.5 0.1 0.05 peak t j = p dm x z jc + t c duty factor d = t 1 / t 2 t 2 t 1 p dm note: t j = 125c t c = 75c microsemi?s products are covered by one or more of u.s. patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,5 03,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 6,939,743, 7,352,045 5,283,201 5,801,417 5,648,283 7,196,634 6,664,594 7,157, 886 6,939,743 7,342,262 and foreign patents. us and foreign patents pending. all rights reserved. e3 100% sn plated to-220 (k) package outline source 10.66 (.420) 9.66 (.380) 5.33 (.210) 4.83 (.190) 14.73 (.580) 12.70 (.500) 1.01 (.040) 3-plcs. 0.83 (.033) 2.79 (.110) 2.29 (.090) 4.82 (.190) 3.56 (.140) 1.39 (.055) 0.51 (.020) 4.08 (.161) dia. 3.54 (.139) dimensions in millimeters and (inches) gate drain 6.85 (.270) 5.85 (.230) 1.77 (.070) 3-plcs. 1.15 (.045) 2.92 (.115) 2.04 (.080) 3.42 (.135) 2.54 (.100) 0.50 (.020) 0.41 (.016) 5.33 (.210) 4.83 (.190) drain 3.683 (.145) max. to-220 (kf) package outline t j = 125c t c = 75c e3 100% sn plated 16.25 (.639) 14.23 (.560) i d , drain current (a) v ds , drain-to-source voltage (v) v ds , drain-to-source voltage (v) figure 9, 15f50k forward safe operating area figure 10, 15f50kf forward safe operating area z jc , thermal impedance (c/w) rectangular pulse duration (seconds) figure 11, 15f50k -maximum effective transient thermal impedance junction-to-case vs pulse duration i d , drain current (a) apt15f50k_kf 050-8145 rev e 3-2010
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